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Gurinder S. Sohi [CANCELLED]4:00 p.m
November 4, 2009
Ford ITW Auditorium
This event has been cancelled.
Distinguished Speaker Series presents Gurindar S. Sohi,
Departments of Computer Science
and Electrical and Computer Engineering,
University of Wisconsin-Madison
"Rethinking Parallel Execution on Multicore Processors" | Abstract:
Parallel processing has finally come into the mainstream of computing as almost every processing chip going forward will have multiple processing cores. Software which is typically written as a sequential program, with the intention of running on a uniprocessor now has to be written to run correctly and efficiently on multiple processor cores. This is a decades old problem, and several decades of research have been invested in trying to find solutions but success has been very limited. New ways about achieving parallel execution are needed in order to easily make use of multicore processors.
The prevailing wisdom, based upon many decades of experience, says that a parallel program representation is required to achieve a parallel execution on multiple processors. This talk will challenge that decades-old wisdom and present a new paradigm for achieving parallel execution. This paradigm, which we call Serialization Sets, achieves parallel execution on multiple processors with a sequential program representation. We will present experimental results gathered on real machines showing that the new paradigm can achieve parallel execution speedups comparable to traditional parallel execution techniques, but can do so with a sequential program representation that does not suffer from the challenges and drawbacks of a parallel representation.
Bio:
Guri Sohi received a Ph.D in Electrical and Computer Engineering from the University of Illinois in 1985. He has been a faculty member at the University of Wisconsin-Madison since graduation, and is currently the John P. Morgridge Professor and the E. David Cronon Professor of Computer Sciences. He was the Chair of the Computer Sciences Department from 2004 until 2008. Sohi's research has been in the design of high-performance microprocessors and computer systems. Topics that he has investigated in the past or continues to investigate include dynamically-scheduled instruction-level parallel processors, out-of-order execution with precise exceptions, non-blocking caches, decentralized microarchitectures, speculative multithreading, computation reuse, memory dependence speculation and prediction, and multicore microprocessors. Results from his research can be found in almost every high-end microprocessor in the market today.
He received the 1999 ACM SIGARCH Maurice Wilkes award "for seminal contributions in the areas of high issue rate processors and instruction level parallelism". At the University of Wisconsin he was selected as a Vilas Associate in 1997, awarded the WARF Kellett Mid-Career Faculty Researcher award in 2000, and was selected as a WARF Named Professor in 2007. He is a Fellow of both the ACM and the IEEE and was elected to the National Academy of Engineering in 2009.
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