Abhishek Das

Ph.D. Student

Electrical Engineering and Computer Science

Northwestern University

Contact :

L458 Technological Institute,
Phone: (847) 467-4610 (Office)

Fax: (847)-467-4144
Email:
ada829 {at} eecs {dot} northwestern {dot} edu

a-das {at} northwestern {dot} edu

Mailing address:

2145 Sheridan Road
L359 Technological Institute,
EECS Department
Northwestern University
Evanston, IL 60208-3118

Intro || News || Teaching || Research || Publications || Courses || Resources

About Me:

Hi! I am a Ph.D. student in the Electrical Engineering and Computer Science (EECS) department at Northwestern University. I am a member of the Center for Ultra Scale Computing and Information Security (CUCIS) and I work with Prof. Alok Choudhary and Prof. Gokhan Memik. I obtained my bachelors degree (B.Tech.) from the Computer Science and Engineering Department at Indian Institute of Technology (IIT), Kharagpur. I spent the summers of 2007 and 2008 at Intel Corporation, Hillsboro, OR, working as a Graduate Research Intern. This site will be updated soon with more information.

Current News:

11/14/2009	-- DATE 2010 paper accepted.
11/12/2008	-- Abhishek presented a MICRO paper at Lake Como, Italy.
03/13/2008	-- Abhishek presented a conference paper in DATE 2008 held at Munich, Germany.
10/08/2007	-- Abhishek presented a conference paper in ICCD 2007 held at Olympic Valley, CA
09/28/2007	-- Abhishek comes back to Northwestern after finishing his summer stint with Intel at Hillsboro, OR
06/10/2007	-- Abhishek presented a workshop paper at the ASGI workshop of ISCA 2007 held at San Diego, CA

Teaching:

Fall 2007 : EECS 361 Computer Architecture
Fall 2006 : EECS 361 Computer Architecture

Research Interests:

Processor Microarchitectures for Power, Reliability, and Security
Reconfigurable computing, FPGA design, Embedded systems, Hardware-Software codesign
Cache Architectures for Chip Multicore Processors
Characteristic Study of data-intensive applications; e.g. Data Mining, MapReduce, Bioinformatics etc.

Publications:

A. Das, G. Memik, J. Zmbreno, and A. Choudhary. “Detecting/Preventing Information Leakage on the Memory Bus due to Malicious Hardware.” In Proc. of Design, Automation & Test in Europe (DATE), March 2010.
A. Das, B. Ozisikyilmaz, S. Ozdemir, G. Memik, J. Zambreno and A. Choudhary. “Evaluating the Effects of Cache Redundancy on Profit.” In Proc. of IEEE/ACM International Symposium on Microarchitecture (MICRO), Lake Como, Italy, Nov. 2008. [pdf][slides] ( Acceptance rate: 19.0%)
A. Das, S. Misra, S. Joshi, J. Zambreno, G. Memik and A. Choudhary. “An Efficient FPGA Implementation of Principal Component Analysis based Network Intrusion Detection System.” In Proc. of Design, Automation & Test in Europe (DATE), Munich, Germany, March 2008. [pdf] (Acceptance rate: 23.7%)
A. Das, S. Ozdemir, G. Memik and A. Choudhary. “Evaluating Voltage Islands in CMPs under Process Variations.” In Proc. of the International Conference on Computer Design (ICCD), Lake Tahoe, NV, October 2007. [pdf] (Acceptance rate: 21%)
A. Das, S. Ozdemir, G. Memik, J. Zambreno, and A. Choudhary. “Microarchitectures for Managing Chip Revenues under Process Variations.” In IEEE Computer Architecture Letters (CAL), Volume 6, June 2007. [pdf]
A. Das, S. Ozdemir, G. Memik, J. Zambreno, and A. Choudhary. “Mitigating the Effects of Process Variations: Architectural Approaches for Improving Batch Performance.” In Proc. of the Workshop on Architectural Support for Gigascale Integration , in conjunction with the 34th International Symposium on Computer Architecture (ISCA), San Diego, CA, June 2007. [pdf]
A. Das , D. Nguyen, J. Zambreno, G. Memik, and A. Choudhary. “An FPGA-based Network Intrusion Detection Architecture.” In IEEE Transactions on Information Forensics and Security (TIFS), Volume 3, Issue 1, March 2008 Pages(s):118-132. [pdf]
D. Nguyen, A. Das, G. Memik, and A. Choudhary. “A Reconfigurable Architecture for Network Intrusion Detection Using Principal Component Analysis.” In Proc. of IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), Napa, CA, April 2006. (poster paper) [pdf]

Courses (at Northwestern):

ECE 361 Computer Architecture

ECE 358 Introduction to Parallel Computing

ECE 510 Power & Reliability of Architectures

ECE 394 ASIC & FPGA Design

ECE 453 Advanced Computer Architecture II

CS 336 Design & Analysis of Algorithms

ECE 452 Advanced Computer Architecture I

EECS 394 VLSI System Design

EECS 493 Design & Analysis of Integrated Circuits

EECS 510 Advanced Data Mining

EECS 499 Independent Study on Secure Systems & Trusted Computing

EECS 545 Teaching Experience

EECS 510 Temperature-Aware and Low-Power Design and Synthesis of Integrated Circuits and Systems

IEMS 419 Technological Entrepreneurship

EECS 510 Interconnection Networks

EECS 546 Teaching Experience II

Links and Resources:

Complete EECS Grad Manual
Indian Graduate Students and Scholars Association (IGSSA)
WWW Computer Architecture Page
French in Action (an online video course for learning French)
My old Homepage

last updated : 11/14/09 by ada829