Department of Electrical Engineering and Computer Engineering

Northwestern University

EECS 452 – Advanced Computer Architecture - I

 

Spring 2009

 

NEWS

 

·        05/05/2009 – Second lab assignment is posted.  The assignment is due Tuesday, May 19th

·        04/28/2009 – First homework assignment is posted.  The assignment is due Thursday, May 7th

·        04/28/2009 – The deadline for selecting class presentation topic is Thursday, April 30th

·        04/28/2009 – The first lab project assignment is posted.  The assignment is due Tuesday, May 5th

·        04/21/2009 – The project progress reports are due Tuesday, April 28th

·        04/07/2009 – The project proposals are due Tuesday, April 14th

·        03/27/2009 – Class web site is up

 

Instructor

Professor Gokhan Memik

Room: L475 Technological Institute

Phone: (847) 467-1168

E-mail: memik@eecs.northwestern.edu

URL: http://www.ece.northwestern.edu/~memik

Office Hours: Friday 2-3pm, Tech L475

 

Location and Time

MG28: TuTh 2:00pm – 3:20pm

 

Course Syllabus:

PDF

 

Lecture Notes:

             

Lec1 (PDF)

Lec2 (PDF)

Lec3 (PDF)

Lec4 (PDF)

Lec5 (PDF)

Lec6 (PDF)

Lec7 (PDF)

Lec8 (PDF)

Lec9 (PDF)

Lec10 (PDF)

 

Homework Assignments (all homework assignments are due start of the class)

 

HW#1 (due Thursday, May 7th)

Questions from the 4th edition of the textbook: 1.3, 1.14, 2.5, 2.6, 2.7

If you own the 3rd edition please solve these problems: 1.8, 1.16, 2.5, 2.6, and this question (PDF)

 

Lab Projects

 

Project#1 (due Tuesday, May 5th). Please read the guide for using SimpleScalar. The binaries can be downloaded using this link.  

 

Project#2 (due Tuesday, May 19th). In this assignment, you will use the same applications and base simulators you have learned in the previous lab assignment.

 

 

Final Project

The project proposals are due April 14, 2009.  The proposal should include ~1 page narration of the topic that will be investigated for the project, list of related works (and/or papers that are read), a plan of how the problem will be attacked and what types of tools/methods will be used during the project.  It should also contain an estimate timeline of major milestones.

 

The project progress reports are due April 28, 2009.  The report should include the articles you have read, a precise plan of research progress (including the types of architectures/optimizations you will study and the simulation infrastructure to achieve this).

 

Presentations

 

Presentation topics and schedule:

 

Date

Presenter(s)

Topic

Articles

05/07/2009

Matthew Lowes

Security

- Nathan Tuck, Brad Calder, George Varghese, "Hardware and Binary  Modification Support for Code Pointer Protection From Buffer Overflow", in Proceedings of the 37th International Symposium on Microarchitecture,  December, 2004 (pdf)

 

- Chenyu Yan, Brian Rogers, Daniel Englender, Yan Solihin and Milos Prvulovic, "Improving Cost, Performance, and Security of Memory Encryption and Authentication", Proc. of International Symposium on Computer Architecture (ISCA), Boston, June 2006. (pdf)

 

05/12/2009

James Swaine

Compilers for Parallel Machines

- Michael Chu, Rajiv Ravindran, Scott Mahlke, "Data Access Partitioning for Fine-grain Parallelism on Multicore Architectures", in Proc. of International Symposium on Microarchitecture, Chicago, IL, Dec. 2007 (pdf)

 

- Wen-Mei W. Hwu, Shane Ryoo, Sain-Zee Ueng, John H. Kelm, Issac Gelado, Sam S. Stone, Robert E. Kidd, Sara Sadeghi Baghsorkhi, Aqeel A. Mahesri, Stephanie Tsao, Nacho Navarro, Steve S. Lumetta, Matthew I. Frank, Sanjay J. Patel, “Implicitly Parallel Programming Models for Thousand-Core Microprocessors”, in Proc. of Design Automation Conference, (DAC-44), 2007 (pdf)

 

05/14/2009

Stephen Wylie

Application-Specific Processors

- T. Karkhanis, J. E. Smith, "Automated design of application specific superscalar processors: an analytical approach", ISCA 2007 (pdf)

 

- Stefanos Kaxiras and Georgios Keramidas, “IPStash: A Power-Efficient Memory Architecture for IP Lookup”, in Proc. of 36th International Symposium on Microarchitecture (MICRO-36), San Diego, CA, Dec. 2003 (pdf) 

 

05/19/2009

Chi-Yo Hsiao

Jing Xin

Reliability

- Mohamed Gomaa, Chad Scarbrough, T. N. Vijaykumar, and Irith Pomeranz, "Transient-Fault Recovery for Chip Multiprocessors", in Proceedings of the 30th Annual International Symposium on Computer Architecture (ISCA), pages 98-109, June 2003 (pdf)

 

- Fred A. Bower, Daniel J. Sorin, and Sule Ozev, "A Mechanism for Online Diagnosis of Hard Faults in Microprocessors", in Proc. of 38th Annual International Symposium on Microarchitecture (MICRO), November 2005 (pdf)

 

- S. Ozdemir, D. Sinha, G. Memik, J. Adams, H. Zhou, “Yield-Aware Cache Architectures”, in Proc. of International Symposium on Microarchitecture (MICRO), Orlando, FL, Dec. 2006 (pdf)

 

- Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, and Jude A. Rivers, "The Case for Lifetime Reliability-Aware Microprocessors", in Proceedings of 31st International Symposium on Computer Architecture (ISCA '04) June 2004 (pdf)

 

05/21/2009

Alexander Neckar

Power

- Trevor Mudge, "Power: A First-Class Architectural Design Constraint". IEEE Computer 2001 (pdf)

- Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Rajeev Rao, Toan Pham, Conrad Ziesler, David Blaauw, Todd Austin, Krisztian Flautner, and Trevor Mudge. "Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation", in Proc. of 36th International Symposium on Microarchitecture (MICRO-36), San Diego, CA, Dec. 2003 (pdf)

 

05/26/2009

Eric Anger

Chip Multiprocessors

- Saisanthosh Balakrishnan, Ravi Rajwar, Mike Upton, Konrad Lai, “The Impact of Performance Asymmetry in Emerging Multicore Architectures”, in Proceedings of the Annual International Symposium on Computer Architecture (ISCA), June 2005 (pdf)

 

- Rakesh Kumar, Dean M. Tullsen, Parthasarathy Ranganathan, Norman P. Jouppi, Keith I. Farkas, “Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance”, in Proceedings of the Annual International Symposium on Computer Architecture (ISCA), June 2004 (pdf)

 

05/28/2009

Anitha Mohan

Lei Xia

Transactional Memory

- Kevin E. Moore, Jayaram Bobba, Michelle J. Moravan, Mark D. Hill & David A. Wood, “LogTM: Log-based Transactional Memory”, in the Proceedings of the 12th Annual International Symposium on High Performance Computer Architecture (HPCA-12), Austin, TX, February 2006 (pdf)

 

- Lance Hammond, Vicky Wong, Mike Chen, Brian D. Carlstrom, John D. Davis, Ben Hertzberg, Manohar K. Prabhu, Honggo Wijaya, Christos Kozyrakis, and Kunle Olukotun, “Transactional Memory Coherence and Consistency”, in Proceedings of the Annual International Symposium on Computer Architecture, June 2004 (pdf)

 

- Chi Cao Minh, Martin Trautmann, JaeWoong Chung, Austen McDonald, Nathan Bronson, Jared Casper, Christos Kozyrakis, Kunle Olukotun, “An Effective Hybrid Transactional Memory System with Strong Isolation Guarantees”, in Proceedings of the Annual International Symposium on Computer Architecture, June 2007 (pdf)

 

- JaeWoong Chung, Chi Cao Minh, Austen McDonald, Travis Skare, Hassan Chafi, Brian D. Carlstrom, Christos Kozyrakis and Kunle Olukotun, “Tradeoffs in Transactional Memory Virtualization”, in Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2006 (pdf)

 

 

 

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